man mips64el-linux-gnuabi64-g++ 能找到许多额外的参数（也不知道选哪一个对龙芯最优化）：

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man mips64el-linux-gnuabi64-g++ 能找到许多额外的参数（man mipsel-linux-gnu-g++也有这些参数，包括mips64 和 -EL参数，但是实测编译不出64位的程序）：
MIPS Options -EL -EB -march=arch -mtune=arch -mips1 -mips2
-mips3 -mips4 -mips32 -mips32r2 -mips32r3 -mips32r5 -mips32r6
-mips64 -mips64r2 -mips64r3 -mips64r5 -mips64r6 -mips16
-mno-mips16 -mflip-mips16 -minterlink-compressed
-mno-interlink-compressed -minterlink-mips16 -mno-interlink-mips16
-mabi=abi -mabicalls -mno-abicalls -mshared -mno-shared -mplt
-mno-plt -mxgot -mno-xgot -mgp32 -mgp64 -mfp32 -mfpxx -mfp64
-mhard-float -msoft-float -mno-float -msingle-float
-mdouble-float -modd-spreg -mno-odd-spreg -mabs=mode
-mnan=encoding -mdsp -mno-dsp -mdspr2 -mno-dspr2 -mmcu -mmno-mcu
-meva -mno-eva -mvirt -mno-virt -mxpa -mno-xpa -mmicromips
-mno-micromips -mfpu=fpu-type -msmartmips -mno-smartmips
-mpaired-single -mno-paired-single -mdmx -mno-mdmx -mips3d
-mno-mips3d -mmt -mno-mt -mllsc -mno-llsc -mlong64 -mlong32
-msym32 -mno-sym32 -Gnum -mlocal-sdata -mno-local-sdata
-mextern-sdata -mno-extern-sdata -mgpopt -mno-gopt
-membedded-data -mno-embedded-data -muninit-const-in-rodata
-mno-uninit-const-in-rodata -mcode-readable=setting
-msplit-addresses -mno-split-addresses -mexplicit-relocs
-mno-explicit-relocs -mcheck-zero-division
-mno-check-zero-division -mdivide-traps -mdivide-breaks -mmemcpy
-mno-memcpy -mlong-calls -mno-long-calls -mmad -mno-mad -mimadd
-mno-imadd -mfused-madd -mno-fused-madd -nocpp -mfix-24k
-mno-fix-24k -mfix-r4000 -mno-fix-r4000 -mfix-r4400
-mno-fix-r4400 -mfix-r10000 -mno-fix-r10000 -mfix-rm7000
-mno-fix-rm7000 -mfix-vr4120 -mno-fix-vr4120 -mfix-vr4130
-mno-fix-vr4130 -mfix-sb1 -mno-fix-sb1 -mflush-func=func
-mno-flush-func -mbranch-cost=num -mbranch-likely
-mno-branch-likely -mfp-exceptions -mno-fp-exceptions
-mvr4130-align -mno-vr4130-align -msynci -mno-synci
-mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address

x86 Windows Options -mconsole -mcygwin -mno-cygwin -mdll
-mnop-fun-dllimport -mthread -municode -mwin32 -mwindows
-fno-set-stack-executable

MIPS Options

-EB Generate big-endian code.

-EL Generate little-endian code. This is the default for mips*el-*-*
configurations.

-march=arch
Generate code that runs on arch, which can be the name of a generic
MIPS ISA, or the name of a particular processor. The ISA names
are: mips1, mips2, mips3, mips4, mips32, mips32r2, mips32r3,
mips32r5, mips32r6, mips64, mips64r2, mips64r3, mips64r5 and
mips64r6. The processor names are: 4kc, 4km, 4kp, 4ksc, 4kec,
4kem, 4kep, 4ksd, 5kc, 5kf, 20kc, 24kc, 24kf2_1, 24kf1_1, 24kec,
24kef2_1, 24kef1_1, 34kc, 34kf2_1, 34kf1_1, 34kn, 74kc, 74kf2_1,
74kf1_1, 74kf3_2, 1004kc, 1004kf2_1, 1004kf1_1, loongson2e,
loongson2f, loongson3a, m4k, m14k, m14kc, m14ke, m14kec, octeon,
octeon+, octeon2, octeon3, orion, p5600, r2000, r3000, r3900,
r4000, r4400, r4600, r4650, r4700, r6000, r8000, rm7000, rm9000,
r10000, r12000, r14000, r16000, sb1, sr71000, vr4100, vr4111,
vr4120, vr4130, vr4300, vr5000, vr5400, vr5500, xlr and xlp. The
special value from-abi selects the most compatible architecture for
the selected ABI (that is, mips1 for 32-bit ABIs and mips3 for
64-bit ABIs).

The native Linux/GNU toolchain also supports the value native,
which selects the best architecture option for the host processor.
-march=native has no effect if GCC does not recognize the
processor.

In processor names, a final 000 can be abbreviated as k (for
example, -march=r2k). Prefixes are optional, and vr may be written
r.

Names of the form nf2_1 refer to processors with FPUs clocked at
half the rate of the core, names of the form nf1_1 refer to
processors with FPUs clocked at the same rate as the core, and
names of the form nf3_2 refer to processors with FPUs clocked a
ratio of 3:2 with respect to the core. For compatibility reasons,
nf is accepted as a synonym for nf2_1 while nx and bfx are accepted
as synonyms for nf1_1.

GCC defines two macros based on the value of this option. The
first is "_MIPS_ARCH", which gives the name of target architecture,
as a string. The second has the form "_MIPS_ARCH_foo", where foo
is the capitalized value of "_MIPS_ARCH". For example,
-march=r2000 sets "_MIPS_ARCH" to "r2000" and defines the macro
"_MIPS_ARCH_R2000".

Note that the "_MIPS_ARCH" macro uses the processor names given
above. In other words, it has the full prefix and does not
abbreviate 000 as k. In the case of from-abi, the macro names the
resolved architecture (either "mips1" or "mips3"). It names the
default architecture when no -march option is given.

-mtune=arch
Optimize for arch. Among other things, this option controls the
way instructions are scheduled, and the perceived cost of
arithmetic operations. The list of arch values is the same as for
-march.

When this option is not used, GCC optimizes for the processor
specified by -march. By using -march and -mtune together, it is
possible to generate code that runs on a family of processors, but
optimize the code for one particular member of that family.

-mtune defines the macros "_MIPS_TUNE" and "_MIPS_TUNE_foo", which
work in the same way as the -march ones described above.

-mips1
Equivalent to -march=mips1.

-mips2
Equivalent to -march=mips2.

-mips3
Equivalent to -march=mips3.

-mips4
Equivalent to -march=mips4.

-mips32
Equivalent to -march=mips32.

-mips32r3
Equivalent to -march=mips32r3.

-mips32r5
Equivalent to -march=mips32r5.

-mips32r6
Equivalent to -march=mips32r6.

-mips64
Equivalent to -march=mips64.

-mips64r2
Equivalent to -march=mips64r2.

-mips64r3
Equivalent to -march=mips64r3.

-mips64r5
Equivalent to -march=mips64r5.

-mips64r6
Equivalent to -march=mips64r6.

-mips16
-mno-mips16
Generate (do not generate) MIPS16 code. If GCC is targeting a
MIPS32 or MIPS64 architecture, it makes use of the MIPS16e ASE.

MIPS16 code generation can also be controlled on a per-function
basis by means of "mips16" and "nomips16" attributes.

-mflip-mips16
Generate MIPS16 code on alternating functions. This option is
provided for regression testing of mixed MIPS16/non-MIPS16 code
generation, and is not intended for ordinary use in compiling user
code.

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